Regviz

Freescale Semiconductor /MK50DZ10 /LPTMR0 /CSR

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Interpret as CSR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (0)TEN 0 (0)TMS 0 (0)TFC 0 (0)TPP 0 (00)TPS0 (0)TIE 0 (0)TCF

TPP=0, TIE=0, TFC=0, TEN=0, TCF=0, TPS=00, TMS=0

Description

Low Power Timer Control Status Register

Fields

TEN

Timer Enable

0 (0): LPTMR is disabled and internal logic is reset.

1 (1): LPTMR is enabled.
TMS

Timer Mode Select

0 (0): Time Counter mode.

1 (1): Pulse Counter mode.
TFC

Timer Free Running Counter

0 (0): LPTMR Counter Register is reset whenever the Timer Compare Flag is set.

1 (1): LPTMR Counter Register is reset on overflow.
TPP

Timer Pin Polarity

0 (0): Pulse Counter input source is active high, and LPTMR Counter Register will increment on the rising edge.

1 (1): Pulse Counter input source is active low, and LPTMR Counter Register will increment on the falling edge.
TPS

Timer Pin Select

0 (00): Pulse counter input 0 is selected.

1 (01): Pulse counter input 1 is selected.

2 (10): Pulse counter input 2 is selected.

3 (11): Pulse counter input 3 is selected.
TIE

Timer Interrupt Enable

0 (0): Timer Interrupt Disabled.

1 (1): Timer Interrupt Enabled.
TCF

Timer Compare Flag

0 (0): LPTMR Counter Register has not equaled the LPTMR Compare Register and incremented

1 (1): LPTMR Counter Register has equaled the LPTMR Compare Register and incremented

Links

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Register License

Redistribution and use in source and binary forms, with or without modification,\nare permitted provided that the following conditions are met:\n o Redistributions of source code must retain the above copyright notice, this list\n of conditions and the following disclaimer.\n o Redistributions in binary form must reproduce the above copyright notice, this\n list of conditions and the following disclaimer in the documentation and/or\n other materials provided with the distribution.\n o Neither the name of Freescale Semiconductor, Inc. nor the names of its\n contributors may be used to endorse or promote products derived from this\n software without specific prior written permission.\n THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS “AS IS” AND\n ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED\n WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE\n DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR\n ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES\n (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON\n ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\n (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS\n SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data